Job Location : Paris, UK
JOB AD:
We have had an exciting opportunity become available in France for a Digital Verification Technical Leader (W/M)
About the company:
Our verification team is seeking a dynamic and experienced Verification Engineer who will actively contribute to the chip/block level digital verifications. In this role, the candidate will technically drive verification strategy and execution of state-of-the-art SoCs and will be in close collaboration with digital and mixed-signal IC design engineers.
Job Summary:
Responsibilities:
You have a solid background in digital electronic and signal processing You are a specialist in SystemVerilog/UVM, with many years of coding and verification experience You have a solid background in scripting languages (TCL, Python, Makefile, etc.) You perfectly understand the full ASIC flow and have a previous significative experience in Gate[1]Level Simulation and/or DFT A previous experience in verification of CPUs (ARM, RISC V) and C-oriented testing is a plus A previous experience in the verification of Interfaces such as PCIe, Ethernet, and DRAM is a plus A previous experience in verification of digital functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus A previous experience with Cadence or Synopsys Simulation/Emulation flow is a plus A previous experience in Formal Verification is a plus You are creative and proactive You demonstrate very good analytical and problem-solving skills You communicate fluently in English (oral and written)
Required experience:
You have a MSc or PhD in Electrical Engineering or equivalent and 10+ years of hands-on experience in chip-level and circuit-level Verification
If you could be suitable for this position, please get in touch.
Salary : -
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